For newcomers: Top trace is the signal coming out of the floppy drive, bottom is a debug output lead from the SX which illustrates detected falling-edges(1’s in the raw MFM), detected rollovers (timeouts which following a 1 indicate a 0 in the raw MFM), and small spikes which indicate a byte transfer to the PC.
Notice some changes here:
First, the overall length of the ISR is reduced. This is because its now in assembly. This saves me minimum 27 cycles because it eliminates overhead of SX/B of preserving SX/B internal variables.
Second, because I’ve moved the point at which the debug lead gets raised closer to the actual firing of the ISR, you can REALLY tell exactly how fast the ISR triggers as a result of an edge. This is alot clearer than it was before. And man is it fast, it’s usually about 60ns, or three cycles.
Third, from advice from Brian, I’ve moved the rollover start point to be EARLIER. This means that instead of detecting rollovers in the MIDDLE of the bitcell, it’s closer to the beginning of the cell. The first “0”-bit ISR used to fire at about 2.7us from the real edge. I’ve moved that to 2.26us, so that main has plenty of processing time AFTER the current ISR but still in the same cell. I had room before TOO, but I’ve given main more room now.
The data portion of the sectors is still getting corrupted. This is because I’m dropping tons of data. Normal sector size is 1088, and I’m getting sizes between 940 and 1084. So I’m dropping approximately 10% of the data someplace.