About eight years ago, I bought a Dell XPS 420 pictured above. This was an Intel Core 2 Quad Q9550 running at 2.83ghz. With 8GB of ram. Despite running reliably for over 8 years, the main problem was that the case was a...
Archive - 2016
New project: modifying Logitech C920 webcam for PCB inspection
I’ve recently spent some time modifying a Logitech C920 webcam for PCB inspection and soldering. Head over to the page for project pictures, links to the various components, tricky gotchas I found during...
Memory controller work continues….workaround 4MB SRAM add-on
SO here’s a couple hundred dollars of SRAM parts ordered to add on to the FPGA. It goes like this: the memory controller isn’t fully integrated yet into the J68 soft-core, so I’ve decided to whack on 4...
Cirrus Logic CS4335 DAC problems finally identified and fixed.
I had some assistance in fixing this problem. My always helpful friend Brian from Canada as well as some help from Steve @ the Audacity forums contributed to solving the problem. They filled in some blanks for me, and...
left-justified DAC problems continue
Here you see the analog sound waveform coming out of the DAC at the top in yellow. I think I’m getting closer……I switched from the I2S DAC to a left-justified DAC just because the LJ one is a little...
Trying to debug my design for an Audio DAC Cirrus Logic CS4334
I purchased a CS4334 to eventually use as an Audio DAC for the badge computer. I’ve never worked with DACs before, and my knowledge of audio is somewhat limited. This audio DAC is a Cirrus Logic CS4334 with...
J68 is now booting from User Flash Memory on the BEMICRO MAX10 FPGA board
I’ve been struggling for quite a few nights and weekends over the last month or so. I’ve now successfully attached the J68 to the built-in User Flash Memory. This means that the 16KB (actually about ~13KB)...
Still debugging the attachment of User Flash Memory to the J68….
So if I take my working UFM avalon-mm Master controller (which if you recall, connects to the Altera Flash Memory IP core), and attempt to attach it to the J68, the J68 no longer boots the ROM monitor code. Since...
LCD Test image and pixel-level detail
So I’ve managed to get a semi-working test pattern image up on the LCD. Here are a couple shots: If we zoom in about 10 times, we can see how the LCD really works, on an individual pixel level: Pretty challenging...
Reverse engineering the LCD interface
So I was having trouble getting the LCD working initially, so I ended up probing a working HDMI to LCD converter board sold by adafruit. You see, this board was driving my LCD just fine, but my FPGA couldn’t do...