Initially, my plan is to make available the main source files. None of this stuff is currently packaged or setup for installation, distribution, etc — but I will make more stuff available as time goes on.
If you don’t see something you need here, please contact and I’ll do my best.
This stuff is not even really alpha stage code, this is sort of raw, unfiltered, latest revisions of my project. There are likely some mistakes in comments because things have changed many many times. Obviously, the code should take precedence over the comments. I’m likely to not have updated an associated comment rather than get the code wrong. (I hope)
Please find the available files for download:
Original AFP for Parallax SX microcontroller AFP-rev97.SXB
OLD schematic using the microcontroller AFPschematic.gif
Java Nostalgia excerpt showing mfm decoding AFPmf-excerpt.java
New FPGA version of the AFP in Verilog AFP-rev18.v
FPGA block diagram showing various FSMs AFP_fpga_block_diag.gif
I’m currently trying to do exactly the same thing that you did by extracting old Amiga disks to PC via USB. I’m using an Altera CPLD 7064 for PLL and filtering plus an ATMEL AT90USB1287 for communicating with the PC in USB.
I’m having a hard time to sync on the MFM pattern and decoding it correctly. I’m close but I’m still banging my head against the wall… ;o)
I was wonderwering, instead of reinventing the wheel, do you still have schecmatic and programs of that project? It could be a good start for me.
Thanks for posting! I’ve added two things to the download page: the old schematic which shows the AFP using an SX microcontroller. This is the old version of the project. New version uses an FPGA, and I added a block diagram showing the layout of the FSMs and basically how everything interconnects.
I haven’t created a physical schematic for the FPGA version because you would have to have the exact board I have for it to be useful.
There’s the logical HDL level block diagram, and that’s what I have listed. There’s some minor mention of physical connectivity, but this should read as an explanation of the verilog code.
READ THE VERILOG(afp-rev18.v above). It’s got tons of comments, and I tried to use registers etc with names that made sense.
I sync in software, not hardware. I look for “10010100010010001001” in binary which is 0x94489. Don’t try to sync on the full AAAAAAAA44894489, sometimes the two bytes of the sync word is 0x2AAA.
I use the FPGA basically to read and buffer the data, to raise/lower the appropriate floppy control leads, and then for the physical connectivity to USB via the USB-TTL converter. There is no PLL — I simply count clock cycles between falling edges, and then store an 8-bit result in the FIFO. The FIFO connects to the UART, and as long as the UART isn’t busy, it constantly floods the UART until there’s nothing left in the FIFO.
I tried adding a PLL circuit, but it really doesn’t help, and the results I’ve got using this method is very reliable with today’s modern floppy drives.
please let me know if you need anything else, or just want to talk (privately, if you want. see email address above) about the various approaches. I’ve tried just about everything. 🙂
Well what can i say to be honest your initial solution if worked out a bit further could be cheaper since the USB interface can be on the same chip as the floppy controller to simplify the design.
Flip side the FPGA allows you freedom and to be independent from hardware vendors.
Reading from a floppy isn’t all that time critical since we are talking about a mechanical interface to a magnetic medium.
So seek times are very high.
To be honest i would take a part from my preferred vendor and do the decoding and encoding of the floppy in the micro-controller i would use. (this means it still all gets done in software)
Besides that I can program it all then in C.
PS: keep on the good work. 😉
Hi Marcel, thanks for the post.
I really haven’t tried optimizing for cost like a traditional commercial hardware designer would. I will say that using FPGAs is a lot more fun, even if just for knowing how much power-in-reserve there is. If I decide tomorrow to add a bunch more DSP-ish stuff, the FPGA will handle it, where the uC will not.
I think they are both suited fine to the task. The overall task, as you point out, isn’t very demanding, so a ton of solutions will work.
I’m not a proponent of C in uC’s just because there’s layers of abstraction and delay that simply aren’t necessary. Sure it’s nice to write in a higher layer language and all that — but I just feel a little too far removed from the hardware. For full disclosure, I *did* do a BASIC / assembly solution which worked out nicely — so perhaps embed some assembly in C where necessary. Personal preference.
Thanks for the encouraging words. You know I have an active project here that I’m working on, right?
Great resources for Amiga floppy work. I have a A500 which I’m looking to convert to use an SD card in place of the external disk drive. Your page should make some of the conversion easier to do.
Thanks for the help,
Good luck with your project. A lot of people have (or are) making “floppy disk emulators” for the amiga. Seems like a popular project idea.
Keep us posted on your progress!
Discovering you site is like discovering a treasure!
I love the Amiga floppy blog and VSC and the logic analyzer section!!!
I’ve tried to download the “AFPschematic.gif” on:
but I’m getting a 404 from the webpage.
Thanks for the comments. I really appreciate it.
And sorry for the slow response. That gif has been updated. This section is a bit old and when I moved hosts, it never got updated to the new URL.
Best of luck!