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inital results on error correction

While I have yet to actually implement the full-scale error correction as I want to, I did some manual tests today. I basically took a track that I was erroring out on, and swapped in 1-bit away values for the bad bytes.  In some cases, it appeared...

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PCB ordered from Seeed Studio

I placed the order late last night for the PCB! The PCB design is obviously finished, fully passes the kicad DRC checks, the problems with the footprints were solved. I’ve decided to go with Seeed Studio’s...

new read routine implementation started

Last night, until 3am, I spent redoing my read routine to incorporate the method discussed in the comment of the last post. Basically, I use the time between the pulses as an indication of the data.  I store 2-bit...

first night wiring progress

Now I remember why I like FPGAs so much, no freakin’ wiring!@!# Here’s a start to what the monster looks like.  I think I’ll like the PCB form factor a little better. 🙂 I thought a little bit about how...

on memory controller optimization

So I’ve been trying to optimize a freeware memory controller for my particular memory chip. I’m running into this situation where the DRAM to ALTRAM copy takes upwards of 24us per line. But I only have a...

Histogram of one track

Here’s a histogram of one track off an amiga floppy disk.  Notice the peaks near 4us, 6us, and 8us. I’ve got this data from my logic analyzer, crunched through my little C proggie, and then graphed with...

Flow control

I’ve gotten away thus far without any flow control. I just started noticing that my software was locking up occasionally when reading a disk. It was locking up in the “read” portion of the code because...