Amiga 500 A501 RAS/CAS dynamic ram timing

So I found myself looking at the dynamic ram timing with a logic analyzer attached to an Amiga 500.

I’m still learning all of this stuff, and after about 45 minutes, I gave up thinking that I was either too tired, or too dumb to catch on to this stuff.

I was relieved when I read a page on the subject from Alan Clements “Microprocessor Systems Design: 68000 Hardware, Software, and Interfacing”

It said, “Few things in the known universe are more terrifying than the timing diagram of a dynamic RAM.”

I smiled with the realization that perhaps I’m not alone. (and that, maybe, just maybe, there’s hope for me yet.)


About the author


Amateur Electronics Design Engineer and Hacker