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inital results on error correction

While I have yet to actually implement the full-scale error correction as I want to, I did some manual tests today. I basically took a track that I was erroring out on, and swapped in 1-bit away values for the bad bytes.  In some cases, it appeared...

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AFP 0.2 WIP SX code

I’ve put some work into cleaning up the SX code tonight. I’ve removed some code sections no longer needed, and added documentation where it was lacking. Code should be commented pretty good. I’ve also...

logic analyzers

I’ve recently received a couple emails on additions to the logic analyzer page. Once I get some time to check them out, I’ll make the corrections. I’ve been super busy with life — switched jobs...

video showing current progress

I posted a video to youtube a little while ago showing my progress. It’s a little long winded (surprise surprise for those who read my posts) but it shows basically the framebuffer portion of the hardware working...

first two bytes of checksum bad

Despite the data being received 100% correct, the data checksum fails in certain cases. It’s always the first two bytes of the 4-byte, 32-bit checksum that are wrong.  The last two are always right.  What does...

of bit-shifted sectors

I’m beginning to think more and more that my software on the SX is just fine. Perhaps minus the idle routine mentioned in the last post. I have to do something there. However, without the idle routine, I was only...

new design

I took David’s advice, and I rewrote the code last night. Some highlights: 1. ISR is entirely in assembly. Although I haven’t manually counted, it appears to be about 400ns in length. 2. ISR triggers only...

redesign of read routine

After skimming the patent I referenced in the earlier post, I’m starting to come to the realization that in order to have an effective floppy controller, I need to implement a decent PLL which can better track the...