Some reverse engineering notes on DataFlyer 500 BUSS Pal

As you may have seen in this other post here I have an interest in this Amiga hard drive controller designed for the Commodore Amiga 500. I used this for years to interface an HDD. At the time I took some photos of the PCB and shared some my notes, I also dumped the Boot ROM from the board, which had already been done previously — and compared it. I did it both as an exercise to play with this stuff, but also to see if mine differed from existing sources, which it did not.

The rest of the board has fairly off-the-shelf 74 logic chips which are called out in that other post, along with the main chip being the AM5380 SCSI IC on the PCB.

One piece of engineering, though, that I assume is custom to Expansion Systems was their PAL. I don’t know what its main function is, but I’m starting to collect information to the form the picture. When these type of chips die, you don’t just go on digikey or mouser and get a new one. So understanding how they work and “backing up” what they do precisely helps preserve these things for the future.

These notes are raw and unrefined, but Bob reminded me that there’s very little specific information about this PAL anywhere on the internet, and thought I’d share.

This exercise was important to determine how the inputs and outputs are being used to determine the optimal dumping strategy.

Pin connections for the TIBPAL16L8-25CN labeled BUSS on the DataFlyer 500 SCSI-only version.

Pins 1-9, and 11 are input-only on the PAL

These inputs are driven by

PALNotes on what’s connected
Pin 1the output from the SN74F32N OR gate chip Pin 8(called 3Y). There’s an OR function between pins 3A and 3B (pins 9 and 10 on that chip) — and output on 3Y(PIN 8). Card edge connector pins 27 and 29. These are pins A1 (29), and A2(27).
Pin 286-pin male header pin 10. This does not connect to the card edge. It also connects to SN74F32N output from the 8-bit comparator. Perhaps for matching 0xE8 0000 address space?
Pin 327C256 ROM pin 8. Address line A2
Pin 427C256 ROM pin 7. Address line A3
Pin 527C256 ROM pin 6. Address line A4
Pin 627C256 ROM pin 5. Address line A5
Pin 7card edge connector pin 68 from Amiga. Bidirectional R_W pin.
Pin 8card edge connector pin 43 from Amiga. Pin from Amiga Address bus. A15
Pin 9card edge connector pin 72 from Amiga. Active low _UDS. Upper data select.
Pin 10Ground
Pin 1186-pin male header pin 55. Card edge pin 53. _RST. This also has a jumper on the board. It’s bidirectional as far as Amiga is concerned. But this is straight input on the PAL.
Pin 12output only pin and drives the active low chip enable pin on 27C256 ROM pin 20. Input on ROM
This lists what’s connected to the various PAL input pins

Pins 13 through 18 are I/O pins and can be either depending on programming/configuration

PALNotes on what’s connected
Pin 13card edge connector pin 16 to Amiga. Active low _CCK. Output by Amiga. Pin must be used as an input pin on the PAL.
Pin 14connected to 74LS373 chip pin 11 latch enable active high. Input on 373.
Pin 15connected to AM5380PC chip pin 24 I/O READ active low. Input on the 5380.
Pin 16connected to AM5380PC chip pin 28 RESET active low. Input on the 5380.
Pin 17connected to AM5380PC chip pin 26 DATA ACKNOWLEDGE active low. Input on the 5380.
Pin 18connected to 74LS373 chip pin 1 OUTPUT ENABLE active low. Input on 373.
Pin 19output only pin. connected to AM5380PC chip pin 21 CHIP SELECT active low. Input on the 5380.
Pin 20VCC +5v
This is a list of what’s connected to the PAL’s output pins

More details

The 8-bit comparator compares the Amiga address bus A23 to A16 with the output from the 373 latch.

The latch gets its values from the Amiga data bus, D15 to D8.

The latch enable is an output from the PAL pin 14.

Disclaimer: This is a work in progress, and info is changing rapidly. Make sure to refresh your cache!

Something to remember is that these notes are not gospel and subject to mistakes, misunderstandings, and incomplete thoughts. The pins are also connected to MULTIPLE THINGS. In many cases, I’m listing just one of them. The signal may not originate from that device, but instead be a consumer of that signal.

Status: Re-verified the pins. Made some corrections to the above tables. Getting odd results from my microcontroller read.


Amateur Electronics Design Engineer and Hacker

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