I was doing some more tests trying to get the PC to fail. It seems that the PC really likes EVEN delays between data, and it’s wierd because faster data that comes in evenly is better than slower data that comes...
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current code plus recent progress
Although its ugly, the new code is here. This shows the entire ISR in assembly now. I do like it much better. Tonight I happened to transfer a track that has a good sector. The sector header passed checksum, as did the...
new book
I picked up a copy of Reversing: Secrets of Reverse Engineering this past weekend. I have about 5 or 6 chapters read. All very good. It was published April 2005 or thereabouts, and so its much more updated than the book...
new timing image
I think this is timing from like 97 or so, and this is pretty good. I’ve switched to 93 for the time being, because I’ve had the best results with that. This still shows accurate reading of this particular...
of bit-shifted sectors
I’m beginning to think more and more that my software on the SX is just fine. Perhaps minus the idle routine mentioned in the last post. I have to do something there. However, without the idle routine, I was only...
