So as my last couple posts alluded to, I’ve been having problems with my DRAM-based design.
My controller isn’t dual-port.
And I’ve been trying to wrap my head around a time-slot method for arbitration. And optimizing memory controllers.
Then it struck me — my incoming and outgoing data rate access to the memory is exactly the same. Because my output is twice the resolution, but half the frequency, the per-frame time is the same for 640×400 @ 32khz as for 320×200 @ 15.7khz.
So if the data rates are the same, what’s stopping me from just putting a little buffer in-line, and forgetting all this complicated DRAM access time issues?
I ran it past my super smart friend Brian, and he’s thinks it’s a fine idea. He recommended perhaps a three line buffer, using separate rams for each line, cycling through each buffer for each incoming/outgoing line.
I’m convinced that the simplest solution is always the best solution which leaves less room for error.
I’m excited about having a new way of moving forward on this. I’ve been stagnant for a couple weeks but that is changing soon enough.