So for the longest time, I’ve wanted to use the onboard 8MB SDRAM that is present on the BEMICRO MAX 10 fpga eval board. This is now a reality! I’ve successfully integrated a controller with some glue logic...

SO here’s a couple hundred dollars of SRAM parts ordered to add on to the FPGA. It goes like this: the memory controller isn’t fully integrated yet into the J68 soft-core, so I’ve decided to whack on 4...

Here you see the analog sound waveform coming out of the DAC at the top in yellow. I think I’m getting closer……I switched from the I2S DAC to a left-justified DAC just because the LJ one is a little...

So we’ve got a frame buffer now which means we can start writing 68K routines to write graphics into it. So here I’m playing around with lines and circles. I’m using a random line drawing routine from...