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inital results on error correction

While I have yet to actually implement the full-scale error correction as I want to, I did some manual tests today. I basically took a track that I was erroring out on, and swapped in 1-bit away values for the bad bytes.  In some cases, it appeared...

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Parallax USR2SER

So I got my Parallax USR2SER in yesterday. Man is this thing tiny!! About the same width of my finger, and about 1/3 the length! And its mostly surface mount stuff….. It works like a charm. Easy installation, I...

Good news good news. First perfect .adf

Good news indeed! I’ve managed to create a fully functioning .ADF from a floppy.  I matched the output from my hardware/software combination with a “transdisk” output, and it matches exactly. I used...

Changes to the PC side

With more and more things pointing to the PC, I’ve decided to really reduce the amount of work the PC has to do in its receive loop. I looked at Marco’s because his was designed to run (albeit in dos/dos...

first day back

You know, I always hate the “first day back” working on a project.  Things always seem to get screwed up between the time I last worked on a project, and that day.  Even if nothing has changed. Or so I say...

Creating more test disks

From both Tim’s suggestions and from a reinforcement from Agans’ Debugging book, Chapter 6, “Divide and Conquer”, they suggest to “Inject Easy-to-Spot Patterns”. And of course, I knew...

new isr thoughts

While this new ISR is indeed easier to understand and much more simple, I can’t help but remember what else my ISR used to do for me. The four things I really lose are: 1> Any type of double 1’s protection...

more real world tests

So tonight, I put my new FPGA implementation of the amiga floppy project to good use.  I read some more of my collection of amiga floppies. GREAT NEWS. It’s working like a champ.  As a matter of fact, I selected...

new design

I took David’s advice, and I rewrote the code last night. Some highlights: 1. ISR is entirely in assembly. Although I haven’t manually counted, it appears to be about 400ns in length. 2. ISR triggers only...

revisited memory routines

I was looking over my reading and writing routines. Minimums for the fram are Clock high min. 28ns Clock low min. 28ns Data setup min 5ns I write in two places: First, when bits are coming in from the drive, and the ISR...

PC to SX transfer images

I haven’t spent much time within the last few days on the project. Looking at the data on the PC, I think that there are still some problems. I think the problems lie in the fact that the interface to the parallel...