SX software progress

Welp, since I fine tuned the PC to very reasonable numbers, I figure a small overhaul of the SX code is in order too.

I had somewhat of an epiphany working the on the SX, which I haven’t *really* looked at in about a month or so. I managed to chop off about 20% of the code. I did this by embedding the actual storing of the data in the ISR. Yes, this makes my ISR heavier by about 120ns, but who cares —- I lose tons of code with the ISR/main communication I had setup, which was really unnecessary. Since SX/B doesn’t allow you to OR a variable, this required a goofy set of if statements to store a 0 or 1.

So now, here’s what the ISR does upon interrupt

1. Determine if interrupt is RTCC rollover OR an edge-triggered interrupt

2. If its RTCC then we haven’t seen an edge, so store a 0.

3. If it was an edge, store a 1.

There’s also some handling in there to deal with idle conditions, etc.

The MAIN function, that is running while the SX isn’t in interrupt, handles the PC communication stuff, ie has a byte been put on the port? Has the PC acked this byte?

It also monitors numstoredbits, which is incremented by the ISR, and anytime it gets larger than 7 bits stored, it puts it on the port, notifies the pc, and then resets the number of storedbits, etc.

This whole method is TONS simpler than what I was doing before. Forget all this garbage about whether the main routine has “received” the data in time, etc etc

I might have a chance tonight to try this new code. If this doesn’t work, then I guess I’ll have to start looking at how exactly I go about “sampling” here. If there’s a problem NOW, I think I’ve narrowed it down to a timing issue. Ie, we’re in the ISR when an edge-event happens,etc

I’m not trying to imply here that “timing issues” are, well, exactly narrowed-down, BUT at least Im starting to trust the code I’ve written both on the PC and on the SX. As I mentioned in earlier posts, the PC is reacting to the flag, handling the transfer, and resetting in 6.5us. The drive won’t be transferring more than one byte of data any more than about every 14us, perhaps thats 575kbps or so. Even if there is overhead on the SX, which there is, the PC can handle this. The overhead on the SX is probably on the order of 1us.

Remember that I’ve seen bitcells that are shorter than 2us, so this is how the data rate would be faster than the 500kbps standard.

About the author


Amateur Electronics Design Engineer and Hacker