Finals week at

Welp, this is finals week, so don’t expect anything new to show up until after April 28th, 2005.

But, this doesn’t mean I’ve forgotten about this project! I am very much interested in moving this forward.

I’m not really sure what my next step is, but I have to start approaching this using the “scientific method”, and start to isolate my issues. So far, the testing and everything is haphazard, and I find myself testing stuff that I’ve done before because I’ve partially forgot what the results of earlier tests were. This is bad, wastes time, etc.

Part of my problems is that the signal has multiple lengths, sometimes it’s a perfect 4us, 6us, or 8us grouping, and sometimes it’s 5.56us or 7.63us. You get the picture. The code has to be able to handle these different situations the same. Also, I think I’m in my ISR simply way too long. I’m missing edges, and this is where I’m screwing up.

If anyone is interested, I’ve included my SX/B code below. You can also find it here for downloading.

FREQ 50000000

' -------------------------------------------------------------------------
' Variables
' -------------------------------------------------------------------------

inputpin var RB.0       'data from drive
outputbyte var RC       'data to pc

byteready var RB.2      'notify pc byte is ready
pcack var RB.3          'pc saying it got the byte

storevalue var bit      'bit to store in the shift reg
samplepin var bit       'actual value of pin at interrupt

numstoredbits var byte      '# of stored bits in shift reg
storedata var byte      'actual stored data
seenedge var bit        'seen an edge or are we idly?
pending var byte        'swapped with wkpnd_b, RTCC or edge?
validhigh var byte      'how many high bits have we seen in a row

inputready var bit      'used for isr to tell main value is ready
                'to be stored

currpos var byte        'current STORE position in FIFO
xferpos var byte        'current XFER position in FIFO
myarray var byte(16)        'FIFO storage

' -------------------------------------------------------------------------
' -------------------------------------------------------------------------


    'RTCC = 0
    RB.1 = 1        'for debugging

    samplepin = inputpin    'grab the pin

    pending = 0
    wkpnd_b = pending   'is this an edge or a rollover

    if pending.0 = 1 then processedge

    if seenedge = 0 then goback 'are we idle?

    if samplepin = 0 then goback    'we shouldn't be at an edge here

    inc validhigh

    if validhigh > 3 then goidle    'more than 3 highs? go idle

    storevalue = 0
    inputready = 1          'tell main the value is ready to be stored

    goto goback

    seenedge = 0            'erase the edge we saw before
    validhigh = 0           'reset and start over
    goto goback


    seenedge = 1            'we've now seen an edge!

    validhigh = 0           'this should already be zero

    storevalue = 1          'store a 1 for an edge
    inputready = 1          'tell main its ready



    wkpnd_b = 0

    RB.1 = 0            'for debugging

    returnint 88

PROGRAM start_point

' Program Code
' -------------------------------------------------------------------------

    'setup port b

    TRIS_B=%11111001        'direction bits rb.0 input, rb.1 & rb.2 output
    ST_B = %11111110        'schmitt trigger for our drive input

    WKPND_B = 0         'clear pending interrupts
    WKED_B = %11111111      'set falling edge trigger
    WKEN_B = %11111110      'enable drive input interrupts
    PLP_B =  %11111110      'enable pullups

    'setup port c

    TRIS_C=0            'enable port c for output
    PLP_C = %00000000

    numstoredbits = 0
    byteready = 0
    seenedge = 0
    pending = 0
    validhigh = 0
    inputready = 0

    currpos = 15
    xferpos = 15

    ' turn on interrupts
    OPTION = $88


    if byteready = 1 then skipthis      'we are already xferring something

    if currpos = xferpos then skipcheck 'we have nothing to send and everything has been ack'd

    outputbyte = myarray(xferpos)

    byteready = 1               'put the byte on the port and tell PC

    goto skipcheck              'we don't need to check an ack this soon after we raised it


    if pcack = 0 then skipcheck

    byteready = 0

    if xferpos > 0 then skipassign

    xferpos = 16


    dec xferpos


    if inputready = 0 then repeat

    inputready = 0

    if numstoredbits > 0 then notzerobits

    storedata = storevalue
    numstoredbits = 1
    goto repeat


    storedata = storedata < < 1 ' shift left to make room for next bit

    if storevalue = 1 then storeaone

    storedata = storedata | 0   ' store a zero

    goto nextstep


    storedata = storedata | 1   'store a one


    inc numstoredbits

    if numstoredbits < 8 then repeat

    'else output data to FIFO, eventually to the PC

    myarray(currpos) = storedata

    if currpos > 0 then skipcurrreset

    currpos = 16


    dec currpos

    numstoredbits = 0

    storedata = 0

    goto repeat

Stick with me and feel free to comment. I need the help!


Amateur Electronics Design Engineer and Hacker

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